Schematic Analysis

Schematic Analysis

Xpedition schematic analysis fully inspects all nets on a schematic using an extensive, intelligent model component library and supports performing schematic analysis in parallel with design capture.

Schematic Integrity Analysis

Using Xpedition® schematic integrity analysis, engineers can fully inspect all nets on a schematic using pre-defined checks and an extensive intelligent model component library. This automated schematic analysis can save design teams hundreds of hours of visual inspection and lab debug time. The checks execute rapidly in parallel with schematic capture, such that layout can commence with the highest confidence for first-pass success.

The 125+ proprietary schematic integrity analysis checks are exhaustive, rapid, and power- and technology-aware. They are designed to identify both parametric errors and poor design practice and work with all major PCB design tools.

Key features of Xpedition schematic integrity analysis include:

125+ built-in automated checks
6 million+ intelligent models
Support for the creation of custom device models
Full inspection of 100% of a schematic’s nets
Support for multi-board interconnect analysis
Easy setup and intuitive operation
Intelligent post-processing results and reporting for tracking and audits
Works with all major EDA tools
No additional infrastructure required

Select examples of the schematic checks performed
by Xpedition schematic integrity analysis include:

Pin voltage parametric verification for maximum, minimum, and logic thresholds
Bus flip errors (MSB to LSB, TX and RX errors)
Full multi-board and backplane interface verification
Pin function compatibility tests
Symbol mismatch (to datasheet)
Driver/receiver technology matching

Diode orientation verification
Driver/receiver function matching
Power/ground/open collector/drain shorts
Capacitor decoupling sufficiency checks
Capacitor voltage derating (to user derating rules)
Redundant resistors (on a net detection)
Open collector/drain verification
Poor design practice checks (i.e.: using pull-ups, pulldowns when needed...)
Power/ground plane connection verification
Component power checks
Multiple or missing power supplies (on a net)
Differential pin verification
Unconnected nets or bus detection
Off-board nets detection
Overloaded pins identification
Unconnected mandatory pins identification
Nets missing driver
Nets missing receiver

On average, Xpedition schematic integrity analysis

performs 400,000 checks per design. An example of the results after performing Xpedition schematic integrity analysis on a schematic are shown in figure above.

Xpedition Schematic Analysis enables full inspection of all nets on a schematic using an extensive intelligent model component library

Automated schematic validation overview video

TECHNOLOGY OVERVIEW

Improve schematic designs with automated PCB design flow

Xpedition schematic integrity analysis provides fully automated schematic verification with schematic capture, which ensures full inspection of all nets on a schematic and reduce design spins, improving time to market.

WHITE PAPER

KEY FEATURES

Ensure Schematic Integrity

Xpedition schematic analysis enables full inspection of all nets on a schematic using an extensive, intelligent model component library. Schematic analysis saves design teams hundreds of hours of visual inspection and lab debug time by analyzing each net within a schematic.