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Xpedition Package Designer
Heterogeneous and homogeneous 2.5/3DIC Package physical implementation and manufacturing handoff.
KEY FEATURES
Physical Implementation & Manufacturing Handoff
Design of High-Density Advanced Packages (HDAP) such as FOWLP, 2.5D/3D, heterogeneous integration using silicon interposers, embedded substrate bridges, System-in-Package, and modules.
Device stacking for 2.5/3D and SiP/Module Integrations
Construct and manage complex device assemblies such as 3D IC, side-by-side, multiple stacks with different heights. Full support for embedded dual-sided die/devices such as interposer/bridge configurations including support for active and passive embedded device.
High Performance Signal & Interface Routing
Quickly implement HBM interfaces with automatic step/repeat of channels including automatic compensation for off-pitch pins. Quickly plan and route data paths with patented Sketch automated routing technology. Built-in automatic SI performance net tuning with automatic shielding of differential pairs and single-ended nets.
Dynamic Metal Fill That Meets Fabrication Requirements
Powerful metal shape processing that is accurate and DFM ready. Proven creation capabilities include multi-pass degassing, metal balancing, dummy fill insertion, offset hatched planes, and dynamic thermal ties. Add and manage metal areas throughout the design process without impacting interactive performance.
System-level Package Connectivity Management
Design and verify complex SiP modules in a fully supported 3D design environment. Simultaneous 2D/3D editing and DRC all within a single design tool that easily detects and avoids 3D-related design issues. Comprehensive real-time wire bonding for the most complex multi-die stacks with user-definable wire profiles with digital, analog, mixed technology support.
Shorten Design Time Through Increased Efficiency
Rapid design construction with layout-driven-design and a start-from-nothing methodology with on-the-fly device and net creation. Rapid design feasibility evaluation with integrated electrical/thermal & stress analysis. Real-time multi-user concurrent team design enables designers to simultaneously work on the same design with real-time visualization of all users' design activity across networks and geographies.
In-Design Geometry-Based DRC Reduces Signoff Effort
Built-in powerful geometry-based DRC comes with multiple common DRC rules. Additional rules can be quickly written, shared and even encrypted. Avoid tapeout ECO's by performing DRC during design.
Comprehensive 3D Package Signoff with Calibre
Provides extensive and comprehensive DRC/LVS signoff verification across every level of the 3D package assembly through direct digital integration with Calibre 3DSTACK. Independently verify the manufacturing outputs, not just the design database. Supports dynamic cross-probing and error markers to quickly identify and resolve issues, ensuring the design matches manufacturing outputs.
System Connectivity Management
A proven path to implementation for large complex packages eliminates the waiting and frustration of traditional tools. Rules and constraint-driven, automated place, route, and metal fill minimizes substrate respins and yield issues while producing consistent high-quality manufacturing output.
Concurrent Team Design Reduces Design Time
Enable multiple designers to simultaneous access and edit the same design with real-time visibility of all active design activity. Set up is fast and easy, is not dependent on any logical or physical design partitioning, and supports design across local and global networks.
High-Performance Signal Routing
Patented sketch technology dramatically improves efficiency through automation while retaining designer control. The challenges of integrating high bandwidth memory (HBM) interfaces are simplified with automated route channel replication, while signal integrity critical signals are managed with integrated net tuning.
Yield Optimizing Metal Creation
A challenging area of advanced IC packaging is the creation and control of metal fill areas in order to meet the yield requirements of the substrate fabricator. This typically includes graduated degassing, metal balancing, acute angle checking, and stress relief features. These capabilities are rules-driven and automated minimizing false verification errors.
HENISWARE
Henis Hardware Co., Ltd.
98/32 Moo 4, Bueng Yitho,
Thanyaburi, Pathumthani, Thailand
12130
+66 (0)2- 531-0997
+66 (0)87- 076 - 2484