This capability allows the user to create a Sketch plan that will only be routed on one end of the plan. By choosing the new command, Route Semi-Trunk, the Sketch plan will be optimized for the end opposite the Route to Dot, and then routed. This can help the user to pre-route interfaces that may still require placement or pin and gate swapping optimization. To complete optimization of an FPGA or ASIC, and insure the placement of the interface is complete, the user can easily Reverse the Sketch plan to optimize the other end.